74HC174D Hex D Flip-Flop with Clear IC’s

The 74HC174; 74HCT174 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the flip-flop and appears at the Q output. A LOW on MR causes the flip-flops and outputs to be reset LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features:

1. Wide supply voltage range from 2.0 to 6.0 V
2. CMOS low power dissipation
3. High noise immunity
4. Input levels:
5. For 74HC174: CMOS level
6. For 74HCT174: TTL level
7. Six edge-triggered D-type flip-flops
8. Asynchronous master reset
9. Complies with JEDEC standards
10. JESD8C (2.7 V to 3.6 V)
11. JESD7A (2.0 V to 6.0 V)
12. Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
13. ESD protection:
14. HBM JESD22-A114F exceeds 2000 V
15. MM JESD22-A115-A exceeds 200 V.
16. Multiple package options
17. Specified from -40 °C to +85 °C and -40 °C to +125 °C.

Packing List:

• 2pcs x 74HC174D Hex D Flip-Flop with Clear IC’s